1. Field of the Invention
The present invention relates to a method of forming silicon-based thin films such as a silicon nitride (SiN) film and a silicon oxide (SiO) film, and a method of manufacturing a thin film transistor (TFT) using these silicon-based thin films.
2. Description of the Related Art
Silicon-based thin films are used as insulating films for TFTs, MOS transistors, and integrated circuits using the MOS transistors.
TFTs using these silicon-based thin films are of a staggered type, an inverted staggered type, a coplanar type, and an inverted coplanar type. A structure of a conventional inverted staggered type TFT will be described with reference to FIGS. 1 and 2.
Referring to FIG. 1, a gate electrode 2 consisting of a metal such as tantalum or chromium is formed on an insulating substrate 1 made of glass or the like, and a gate insulating film 3 is formed on the gate electrode 2. An i-type semiconductor film 4 consisting of i-type amorphous silicon (i-a-Si) is formed on the gate insulating film 3 so as to oppose the gate electrode 2. Source and drain electrodes 5 and 6 made of a metal such as chromium are formed on the i-type semiconductor film 4, respectively, through n-type semiconductor layers 7 and are spaced apart from each other by a predetermined distance to form a channel region. Each n-type semiconductor layer 7 consists of n-type amorphous silicon (n.sup.+ -a-Si) doped with an impurity. A protective layer (not shown) is formed to cover the entire structure.
FIG. 2 shows an improvement of the inverted staggered type TFT shown in FIG. 1. This TFT includes a blocking layer 8 consisting of an insulating film in a region constituting the channel region of the i-type semiconductor layer 4. Other portions of this TFT are the same as those in FIG. 1, and the same reference numerals as in FIG. 1 denote the same parts in FIG. 2.
In these TFTs, silicon nitride (SiN) films are used as the gate insulating films 3 and the blocking layer 8 (only the TFT shown in FIG. 2), and a silicon oxide (SiO) film is used as the protective film (not shown).
In each of these conventional TFTs, a silicon-based thin film such as an SiN film and an SiO film is formed by a plasma CVD method. This plasma CVD method is a method of supplying a process gas to a chamber in which a substrate heated to a predetermined temperature is set, causing a high-frequency glow discharge (RF discharge) upon supply of an RF current so as to set the process gas in a plasma state while the pressure of the process gas is controlled to a predetermined value, and depositing a silicon compound on the substrate, thereby forming a silicon-based thin film.
The process gas consists of a main reaction gas serving as a source gas for a film to be formed and a carrier gas for diluting the main reaction gas to obtain the plasma state. In order to form the SiN film, monosilane (SiH.sub.4) gas and ammonia (NH.sub.3) gas constitute a main reaction gas, and nitrogen (N.sub.2) gas is used as a carrier gas. In order to form the SiO film, monosilane (SiH.sub.4) gas and the laughing (N.sub.2 O) gas constitute a main reaction gas, and nitrogen (N.sub.2) gas is used as a carrier gas.
Formation of the above silicon-based thin film is performed by the following steps as indicated by supply of the process gas and the RF discharge timings in FIG. 3.
A substrate heated to a predetermined temperature is set in a chamber, and the chamber is evacuated. The process gas as a gas mixture of the main reaction gas and the carrier gas is supplied and controlled to have a predetermined pressure. When about 15 minutes for stabilizing the pressure of the process gas and the substrate temperature elapse, an RF current is supplied to start an RF discharge, thereby generating a plasma and starting deposition of a silicon-based thin film. When a period of time required for depositing this thin film to a predetermined thickness elapses, supply of the RF current is stopped to interrupt the RF discharge. With a lapse of a few seconds, supply of the process gas is stopped.
In order to obtain a dense silicon-based thin film (especially a silicon nitride thin film) which is free from defects and has a high breakdown voltage, the silicon nitride thin film is formed at a substrate temperature of about 350.degree. C. and an RF power of 120 to 130 mW/cm.sup.2.
A composition ratio (Si/N) of the number of silicon (Si) atoms to the number of nitride (N) atoms of the resultant silicon nitride film has a value close to a stoichiometric ratio (Si/N=0.75) of the chemically stablest silicon nitride (SiN). The obtained silicon nitride film is dense, is free from defects and has a high breakdown voltage.
Since film formation is performed while the substrate temperature is kept maintained at 350.degree. C., the substrate must be gradually heated not to cause defects such as distortion and cracks of the substrate. In addition, the substrate must be cooled over a long period of time longer than the heating time so as to prevent the silicon nitride film from being cracked by a stress caused by a difference between the thermal expansion coefficients of the substrate and the silicon nitride film. Therefore, according to the conventional film formation method, heating and cooling periods of the substrate are prolonged to degrade the formation efficiency of silicon-based thin films, resulting in low productivity.
The above method of forming the silicon-based thin film is used in the fabrication step of the TFT shown in FIG. 2. Steps in manufacturing this TFT will be described below.
A metal film consisting of chromium (Cr), tantalum (Ta), molybdenum (Mo) or the like is formed on a substrate 1 by a sputtering apparatus and is patterned by a photoetching method, thereby forming a gate electrode 2 and a gate line portion connected to this gate electrode 2.
A gate insulating film 3, an i-type semiconductor layer 4, and a blocking insulating film 8 are sequentially formed on the substrate 1 by a plasma CVD apparatus.
The blocking insulating film 8 is patterned by a photoetching method to leave the blocking insulating film 8 in only the channel region of the i-type semiconductor layer 4.
An n-type semiconductor layer 7 is formed on the i-type semiconductor film 4 by a plasma CVD apparatus and a metal film made of chromium, tantalum, or molybdenum serving as source and drain electrodes 5 and 6 is formed on the n-type semiconductor layer 7 by a sputtering apparatus. The metal film and the i-type semiconductor layer 7 are patterned by a photoetching method to form source and drain electrodes 5 and 6.
The i-type semiconductor layer 4 is patterned in the form of a transistor to finish a thin film transistor or TFT.
During the manufacturing process of the above TFT, the gate insulating film 3 and the blocking layer 8 are made of SiN films, and the i-type semiconductor film 4 comprises a hydrogenated amorphous silicon (a-Si:H) film. The n-type semiconductor film 7 comprises an n.sup.+ -type a-Si film. The SiN films are formed at a substrate temperature of 350.degree. C. and an RF discharge power density of 120 to 130 mW/cm.sup.2 so as to obtain dense films having high breakdown voltages. The hydrogenated amorphous silicon (i-a-Si) film is formed at a substrate temperature of about 250.degree. C. and an RF discharge power density of 40 to 50 mW/cm.sup.2 to as to prevent a decrease in hydrogen content. The n.sup.+ -type a-Si film is formed under the same conditions as those of the i-a-Si film. In this manner, when a plurality of films are continuously formed on one substrate at different substrate temperatures during film formation, a plasma CVD apparatus having a schematic arrangement shown in FIG. 4 is used. FIG. 4 shows the plasma CVD apparatus for continuously forming the gate insulating film 3, the i-type semiconductor film 4, and the blocking layer 8.
This plasma CVD apparatus comprises a substrate loading chamber 11, a silicon nitride formation chamber (to be referred to as a gate insulating film formation chamber hereinafter) 12 for forming the gate insulating film 3, a substrate cooling chamber 13, an amorphous silicon formation chamber (to be referred to as an i-type semiconductor formation chamber hereinafter) 14 for forming the i-type semiconductor film 4, a substrate heating chamber 15, a silicon nitride film formation chamber (to be referred to as a blocking layer formation chamber hereinafter) 16 for forming the blocking layer 8, and a substrate unloading chamber 17. These chambers are continuously formed.
The gate insulating film 3, the i-a-Si layer 4, and the blocking layer 8 are formed by this plasma CVD apparatus in the following manner.
A substrate is loaded in the substrate loading chamber 11 and is heated to an SiN film formation temperature (about 350.degree. C.). The heated substrate is transferred to the gate insulating film formation chamber 12, and the gate insulating film 3 is formed under the above film formation conditions.
The substrate is then transferred to the substrate cooling chamber 13, and the substrate temperature is decreased to an i-a-Si layer formation temperature (about 250.degree. C.), and the cooled substrate is transferred to the i-type semiconductor film formation chamber 14, and the i-type semiconductor film 4 is formed under the above conditions.
The substrate is then transferred to the substrate heating chamber 15 to heat the substrate to an SiN film formation temperature (about 350.degree. C.). The heated substrate is transferred to the blocking layer formation chamber 16, and the blocking layer 8 is formed under the above conditions.
The substrate is then transferred to the substrate unloading chamber 17 and cooled to an ambient temperature (room temperature). The cooled substrate is removed outside the substrate unloading chamber 17.
In this case, it takes a long period of time to gradually heat the substrate in the loading chamber 11 and the substrate heating chamber 15 and to gradually cool the substrate in the substrate cooling chamber 13 and the substrate unloading chamber 17 so as to prevent cracks caused by a heat stress acting o the SiN film and the i-a-Si layer formed on the substrate.
When the inverted staggered type thin film transistor having no blocking insulating layer 8 shown in FIG. 1 is to be formed, the n-type amorphous silicon layer (to be referred to as an n.sup.+ -a-Si layer hereinafter) serving as the n-type semiconductor layer 7 is formed immediately after the i-type semiconductor film 4 is formed. The film formation conditions of the n.sup.+ -a-Si layer can be the same as those of the i-a-Si layer. Therefore, the gate insulating film, the i-type semiconductor layer, and the n-type semiconductor layer of the TFT in FIG. 1 are formed by a plasma CVD apparatus arranged such that the substrate heating chamber 15 and the blocking layer formation chamber 16 are eliminated from the plasma CVD apparatus in FIG. 4, and an n.sup.+ -a-Si layer formation chamber is arranged between the i-type semiconductor film formation chamber 14 and the substrate unloading chamber 17.
In this staggered type thin film transistor, after the source and drain electrodes and the n.sup.+ -a-Si layer formed thereon are sequentially formed, the i-a-Si layer and the gate insulating film are sequentially formed, and a gate electrode is formed thereon. Therefore, the i-a-Si layer and the gate insulating film of this staggered type TFT can be formed by a plasma CVD apparatus having contiguous chambers, i.e., a substrate loading chamber, an i-type semiconductor film formation chamber, a substrate heating chamber, a gate insulating film formation chamber, and a substrate unloading chamber.
According to the above conventional method of manufacturing a thin film transistor, the gate insulating film is formed at a film formation temperature of about 350.degree. C., and the i-type semiconductor film is formed at the film formation temperature of about 250.degree. C. For this reason, for example, in the manufacture of the inverted staggered type thin film transistor, the substrate on which the gate insulating film is formed in the gate insulating film formation chamber 12 is adjusted to a temperature at which the i-type semiconductor film can be formed, and the temperature-adjusted substrate must be transferred to the i-type semiconductor film formation chamber 14. For this reason, the conventional plasma CVD apparatus includes the substrate cooling chamber 13 formed between the gate insulating film formation chamber 12 and the next i-type semiconductor film formation chamber 14 to cool the substrate having the gate insulating film thereon to an i-type semiconductor film formation temperature. Since the substrate must be gradually cooled over a long period of time, as described above, it takes a long period of time to cool the substrate having the gate insulating film formed at a temperature of about 350.degree. C. to a temperature of about 250.degree. C.
The above problem is also posed by the manufacture of the staggered type thin film transistor. In this case, the substrate having the i-a-Si film formed in the i-type semiconductor film formation chamber is heated to the gate insulating film formation temperature in the substrate heating chamber, and the heated substrate must be transferred to the gate insulting film formation chamber. Since this substrate heating must be slowly performed over a long period of time, it takes a long period of time to heat the substrate having the i-a-Si layer formed at the film formation temperature of about 250.degree. C. to the temperature of about 350.degree. C.
For this reason, the conventional TFT manufacturing method cannot manufacture thin film transistors with high efficiency.